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السلام عليكم ورحمة آلله وبركآته ()

آود منكم شرح لي هذه الاسئله :)

1)

A computer uses. a memory of 65,536 words with eight bits in each word. It has the following registers: PC, AR, TR (16 bits each), and AC, DR, IR (eight bits each). A memory-reference instruction consists of three words: an 8-bit operation-code (one word) and a 16-bit address (in the next two words). All operands are eight bits. There is no indirect bit.

1. Draw a block diagram of the computer showing the memory and registers as in Fig. 5-3. (Do not use a common bus).

2. Draw a diagram showing the placement in memory of a typical three-word instruction and the corresponding 8-bit operand.

3. List the sequence of microoperations for fetching a memory reference

instruction and then placing the. operand in DR.. Start from timing signal To.

2)

Show the contents in hexadecimal of registers PC, AR, OR, IR, and SC of the basic computer when an ISZ indirect instruction is fetched from memory and executed. The initial content of PC is 7FF. The content of memory at address 7FF is EA9F. The content of memory at address A9F is 0C35. The content of memory at address C35 is FFFF. Give the answer in a table with five columns, one. for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

3)

An instruction at address 021 in the basic computer has I = 0, an operation code of the AND instruction, and an address part equal to 083 (all numbers are in hexadecimal). The memory word at address 083 contains the operand BBF2 and the content of AC is A937. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC. AR, DR, AC, and IR. Repeat the problem six times with an operation code of another memory instruction

4)

Assume that the first six memory references instructions in the basic computer listed in table 5-4 are to be changed to the instructions specified in the following table. EA is the effective address that resides in AR during time T4. Assume that the adder and logic circuit in Fig5-4 can perform the exclusive OR operation AC AC ⊕DR . Assume further that the adder and the logic circuit cannot perform subtraction directly. The subtraction must be using the 2’s complement of the subtrahend by complementing and incrementing AC, give the sequence of register transfer statements needed to excute each of the listed instruction specifies a change in its content . You can use TR to store the content of AC temporary or you can exchange DR and AC

5)

The content of AC in the basic computer is hexadecimal A937 associated and the value of E is 1. Determine the contents of AC , E , PC , AR and IR in hexadecimal after the execution of the CLA instruction. Repeat 11 more starting from each one of the register- references instructions .The initial of PC is hexadecimal 021.

ولكككككم مني جزيل الشكر () ....

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ويييينكم :( !

ابي بس ششرح :"(

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