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      تسجيل عضوية جديدة في المنتدى   01/31/2016

      السلام عليكم ورحمة الله وبركاته  عزيزي العضو الجديد :  حاليا رسالة الإيميل لتأكيد صحة إيميلكم تذهب للبريد العشوائي ( جاري حل المشكلة )  فإذا لم تجد رسالة التحقق من إيميلكم في صندوق الوارد لديكم إتجه للبريد العشوائي ( JUNK)  وقم بتفعيل إشتراككم من هناك   

GarfieldX

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عن GarfieldX

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  1. An Experts-Exchange question !

    hehehe ... good one but naaaaahhh ... not enough ... i've read all the realted mindshare books ... and a peace of advice ... if soneone asks questions at this level, beleive me he must read something easy to reach like this .... hehehe ... but thanks for ur help :)
  2. An Experts-Exchange question !

    allllllll riiiiiighhhhtt thx guyzzzzz for the awesome answerssss .... yeah i knew that would happen anywayz ... if no answers then help me find the answer ... anyone knows where these documents could be found ? EISA Specification, Version 3.12 (it is out of stuck in global engineern website !!) IEEE Draft Standard P996 (in ieee website they say u have to call someone to purchase !!) PS/2 Technical Reference - AT Bus Systems (nothing downloadable on the ibm website !!) thx
  3. hi everyone ... sorry but my arabic is not that good and i don't have an arabic keyboard system ... anywayz ... i have some questions regarding the ISA-based system boot process: As far as my knowledge and reading are concerned, when an x86 processor is reset, the initial CS:IP (or CS:EIP) equals to FFFF0 (when 8088 or 8086), FFFFF0 (when 80286), and FFFFFFF0 (when 80386 or later). This address is supposed to be of the first instruction to be fetched. Is this a RAM or ROM address? If Rom than who is responsible for shadowing the ROM into the RAM later on, the ROM itself or the OS after booting up? If RAM, on the other hand, than I suppose that the ROM shadowed itself into the RAM. Is that right? In this case, where the ROM does the shadowing, does this process take place before the processor fetches the first instruction (a pre-initializing process) or after that (during the POST/BOOT execution of the ROM)? Also why the address space between FFFF0 and FFFFF is called boot ROM while the processor start fetching from other addresses like FFFFF0 (when 80286), and FFFFFFF0 (when 80386 or later)? Is the first fetched instruction a jump to the boot ROM (FFFF0) for compatibility issues? There are more expert questions but first let’s hear something about these questions. Thanks guys and have a nice day.
  4. WMI books

    عفوا ... انا عضو جديد في المنتدى ممكن مساعدة لو تكرمتوا ... :wacko: ممكن أحد يعطيني وصلات لتحميل كتب برمجة الـ WMI (Windows Management Insturmination) بواسطة لغة الـ C# وذلك لأني حاب أعمل برنامج يتعامل مع الـ System.Management وشكرا :rolleyes: